A semiconductor integrated circuit is formed on a semiconductor substrate (wafer). The quality of the crystal property not only within the wafer but also near the wafer surface plays an important role. Accordingly, the crystal property on the wafer surface and near the surface affecting the property on the surface has been evaluated. Most of such evaluation relies upon the deterioration degree of crystal property such as stacking fault and slip caused by thermal treatment accompanied by oxidation or diffusion, and upon the amount of precipitated substances caused by solid-solution oxygen near the surface.
With the above-described conventional evaluation method, thermal treatment similar to the actual semiconductor device manufacturing process is required, unable to provide correct evaluation.
Electrical characteristics such as junction leakage are important for highly integrated DRAMs. Such electrical characteristics are influenced by crystal defects near the surface which is so fine as to be difficult to be detected by the above-described conventional evaluation method. A distinct difference of yield between devices appears even by using wafers evaluated by the conventional method as having no significant difference.